Lecture 9 | The Processor-Part2

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方法：如果上一次跳了，这次也跳

Use dynamic prediction：

专门用于储存branch记录

pc是64bit，太大了，我们只取低的几位n

可能会低几位有正好重复的，导致准确率降低，但是同时减少了reg的s/l开销

To execute a branch
- Check table, expect the same outcome
- Start fetching from fall-through or target
- If wrong, flush pipeline and flip prediction

1-Bit Predictor 就只记上一次是否有branch

对于loop循环有Shortcoming

Inner loop branches mispredicted twice!
- Mispredict as taken on last iteration of inner loop.
- Then mispredict as not taken on first iteration of inner loop next time around

对于for循环有特效

Only change prediction on two successive mispredictions

Even with predictor, still need to calculate the target address

Branch target buffer

这个存的下一级要去的的pc地址

Branch prediction buffer 存的是跳转行为，决定是否要跳转

Cache of target addresses
Indexed by PC when instruction fetched
- If hit and instruction is branch predicted taken, can fetch target immediately

4.9 Exceptions and Interrupts

“Unexpected” events requiring change in flow of control

软件处理

遇到问题，保存当前位置，将相关信息交给专门的程序去统一处理

Save PC of offending (or interrupted) instruction
- Supervisor Exception Program Counter (SEPC) 用于储存当前PC
Save indication of the problem
- Supervisor Exception Cause Register (SCAUSE) 一组reg，传递异常时的状态，借给OS去处理
Jump to handler
1. Assume at 0000 0000 1C09 0000hex，异常处理程序的地址

硬件处理，指用硬件判断异常情况

也是需要专门的程序，但是用硬件先判断是什么异常，根据情况跳到不同程序去分别处理

Vectored Interrupts
- Handler address determined by the cause
Exception vector address to be added to a vector table base register
- Undefined opcode 00 0100 0000two
- Hardware malfunction: 01 1000 0000two
- ...
Instructions either
- Deal with the interrupt, or Jump to real handler